The present invention generally relates to signature circuits, and more particularly to a signature circuit which stores device functions of a non-volatile memory device.
In non-volatile memory devices such as a programmable read only memory (PROM), the device function, such as the write function, differs depending on the chip although the same basic chip (PROM) is used. Hence, in order to clearly indicate the device function of the chip to the user, the PROM is provided with a signature circuit which prestores signature information which describes the device function.
Conventionally, the following measures are taken in order to afford a plurality of different kinds of device functions with a single basic chip. For example, one bonding wire interconnection is made with respect to the basic chip for providing a first device function, and another bonding wire interconnection is made with respect to the same basic chip for providing a second, different device function. As a result, it becomes possible to produce chips having selectable, different device functions while using the same basic chip. The selectable device functions of each chip are stored in the signature circuit in the form of plural signature type information.
FIG. 1 generally shows a PROM which is provided with an example of a conventional signature circuit. In FIG. 1, the PROM includes a memory cell array 1, a row decoder 2, a column decoder 3 and a sense amplifier 4.
FIG. 2 shows the conventional signature circuit together with related parts of the PROM shown in FIG. 1. One of bit lines b0 through bn is selected by a corresponding one of bit line selection signals Y0 through Yn respectively applied to n-channel field effect transistors (FETs) Q0 through Qn in response to an address signal, and the thus-selected bit line thereby is connected to a sense amplifier 4. Likewise, one of word lines W0 through Wn+2 is selected by a corresponding one of the respective word line selection signals X0 through Xn+2 in response to the address signal. Only one word line is shown in FIG. 1 in association with the one row of memory cells MS0 through MSn, for purposes of clarity, and it will be understood to represent a plurality of word lines W0 through Wn which are respectively connected to the memory cells MS0 through MS, which store the actual information, for plural such rows of memory cells. A memory cell which is written with a value "1" permits a current flow therethrough when the word line connected thereto is selected, while a memory cell which is not written with information (or written with a value "0") does not permit a current flow therethrough when the word line connected thereto is selected.
A plurality of ROM cells for storing first type signature information are connected to the word line Wn+1, and a plurality of ROM cells for storing second type signature information are connected to the word line Wn+2. In this example, a short-circuit indicated by a mark "x" is formed between a drain of the ROM cell and the corresponding bit line to store the value "1", and an open circuit indicated by a mark "o" is formed between the drain of the ROM cell and the corresponding bit line to store the value "0". The values "0" and "1" are written selectively into the ROM cells which are connected to the word lines Wn+1 and Wn+2 to store the first and second signature information. The writing of information of the type written into the memory cells MS, which are connected to the word lines W0 through Wn is not carried out with respect to the ROM cells which are provided for storing the first and second signature information.
According to the conventional signature circuit, the first signature information is read out by setting the word line selection signals X0 through Xn and Xn+2 to low levels and the word line selection signal Xn+1 to a high level, and successively selecting the bit lines b0 through bn. Similarly, the second signature information is read out by setting the word line selection signals X0 through Xn and Xn+1 to low levels and the word line selection signal Xn+2 to a high level, and successively selecting the bit lines b0 through bn.
Therefore, the conventional signature circuit requires a number of word lines exclusively for the signature circuit, where this number is equal to the number of signature information types to be stored. In the example shown in FIG. 1, two word lines Xn+1 and Xn+2 are provided exclusively for the signature circuit because first and second signature information types are to be stored. Accordingly, the number of word lines provided exclusively for the signature circuit increases with the number of signature information types to be stored, and there is a problem in that a large area is occupied by the word lines and related interconnections.